Hi all,
Thanks for your responses.
I think I need to describe more about my VCO:
1. My design is an nMOS cross-coupled LC-VCO.
I cannot have a separate gnd for VCO because the pin number is limited.
The measured spurs are large (~-50dBc @ 40 MHz) and cannot be suppressed with a narrower PLL bandwidth.
So I think the spur may coming into the VCO through Vdd or gnd.
2. The supply voltage is very low (1.05V). After the regulator I have almost no headroom for a current source attached to ground.
Is there any method to suppress ground noise with fewer voltage consumption?
3. I simulated the gnd psrr in two different cases:
In case I, the gain from gnd to VCO output is much greater than vdd. (The simulation result is post in the beginning)
However in case II, the gain from gnd is much smaller than vdd.
I am confused which result is correct?