Sharath Raju
Junior Member
Offline
Posts: 15
|
Hi,
I understand that the internal resistance of the "port" source is 50 ohm by default. If the peak voltage amplitude is set to 1 V and the termination is set to 50 ohm, shouldn't the peak voltage across the 50 ohm load be 0.5 V due to a voltage division between the 50 ohm impedance of the source and the load ?
To do a sanity check, I replaced the port source with a "vsin" source in series with an external 50 ohm resistance. The source voltage divides in half as expected.
Attached is the schematic and simulation result. Note that /L and /Lprime are the load voltage waveforms with the port and vsin sources respectively.
Thanks, Sharath
|