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DC simulation setup for LNA in Cadence (Read 2100 times)
sweetchoto
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DC simulation setup for LNA in Cadence
Apr 03rd, 2013, 12:05pm
 
Dear All,

I am a new user to Cadence and have to use it for designing a LNA. I was wondering if some one can provide/point me a tutorial with step by step information of how to setup DC simulation in order to determine suitable bias point for my transistor.

Thanks,
Sweetchoto
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sheldon
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Re: DC simulation setup for LNA in Cadence
Reply #1 - Apr 3rd, 2013, 9:47pm
 
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