Over voltage from drain to source could cause "punch through" where the D-S depletion regions run into each other and form a high conductance path.

I guess you could tell the difference between gate oxide breakdown and punch through by measuring the gate-source, gate-drain and drain source resistances. If the G-S and G-D resistance is high and D-S low then maybe it is punch through.

During the bias change does the gate voltage go up or down and what happens at the D and S during the change?

I suppose the recovery is totally dependent on the maximum current drawn under the condition.

I guess the question is "what changes a lot with a small change in bias?"

Accessing the breakdown voltage conditions are fairly straight forward. Beyond that, you would look at mechanism that exponentially increase current to the point of physical breakdown.

Hi all,


thanks for the replies.

I guess what I'm trying to say is that in my case, there's a tipping point. The current shouldn't change much as its just a small change in the biasing (and it actually shouldn't directly affect current anyway). Also, after the breakdown, the circuit no longer functions and there is a small leakage current from the supply.

From analyzing the circuit, its possibly a high VDS (punch through), a high VGD (gate dielectric), or even high current at high VDS (HCI). But my thinking is that if there isn't an enormous current, then the circuit should be able to recover from punch through. Also, HCI is more of a long-term degradation mechanism. That leaves gate dielectric breakdown. From personal experience, I feel that this is most likely the cause as the circuit will seem OK until the break point is reached, at which point it will just die...

So just curious if any other explanations are possible. Also, sorry that I can't provide schematics as its a little sensitive.


regards,
Aaron

Quote:


thanks. That might be a posibility too...


Aaron