Dear all
I need some  help to interpret correctly HSPICE's results concerning probes.
my spice file  is   test.net
Code:

*
hdl  'probe.va'
v1 1 0 10
x1 1 0 probe r=1
.op
.end
 

Case 1 : I use the following veriloga file
Code:

module probe(p, n);
inout p, n;
electrical p, n;
parameter real r=1 exclude 0;
analog
    $display("##%g",I(p));
endmodule
 

For this  current probe HSPICE outputs:
##-2e+14

Case 2: Change  the unnamed branch as follows
Code:

$display("##%g",I(p,n));
 

Output is:
##-0


Case 3: Change  the branch current probe to port current probe
Code:

$display("##%g",I(<p>));
 

Output is:
##-0

Case 4: Add a new branch  and probe   its flow
Code:

branch (p,n) bprobe;
...
 $display("##%g",I(bprobe));
 

Output is :
##-2e+14

Case 5: contribute to the unnamed branch
Code:

module probe(p, n);
inout p, n;
electrical p, n;
branch (p,n) bprobe;
parameter real r=1 exclude 0;
analog begin
    I(p,n)  <+ V(p,n)/r;
    $display("##%g",I(bprobe));
end
endmodule
 

Output is :
##-5

Renew all these 5 examples with a current source connected  to the veriloga instance to obtain case 6 to 10
HSPICE outputs -5  for all the  cases

These results are confusing.
For Case 1 and Case2, it seems that a minimal conductance is used to avoid the short circuit of the voltage source  but why Case2 and Case2 are giving differents results. Case3 and Case4  seems ok but how interpret Case5 ?.

Similar questions for the current source cases.

Need help to interpret these results.
Best regards

I would have said that all of these forms:
 I(p)
 I(p,n)
 I(bprobe)

would short the "p" terminal to ground, and I would have expected the same answer for all of them.  I(p) implicitly connects to ground; the other two connect to ground because of how the instance is wired in the netlist.

I(<p>) is slightly different, because it asks for the port current, but there is no current in the module (no current in any named or unnamed branch connecting to p).