Hi xianweng,
what does the DRM say?
- B O E

Usually the limit is set to those allowed by the Design Rules of the process. A waiver may be available at your own risk.  For a capacitor, just use more devices in parallel. For use as a long mosfet, use several in series with their gates tied together.

Kevin Aylward wrote on Aug 9^th, 2013, 7:40am:


Kevin_Aylward ,thank you for your reply.
We want to change technology of a chip that layout were already done .In that version ,some length of decouple capacitance (mos as capacitance)exceed the new pdk's limit.

In design rule,it just say the min length of mos,but do not say the max,so I think i will be ok if L exceed the pdk limit just as capacitance

If you want higher Length permitted than PDK. Just stack the transistors!!!