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Adjacent Channel Rejection filter for GMSK receiver (Read 4426 times)
pa2ees
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Adjacent Channel Rejection filter for GMSK receiver
Oct 09th, 2013, 2:19pm
 
I am exploring the design of a GMSK receiver, and I'm having trouble with understanding what kind of filter to use at the IF to reject adjacent channel signals (which can be 60dB louder than the signal of interest).  

My RF is around 13MHz, and the channels are 500kHz apart.  I am going to mix down to an IF of 1MHz.  My question is: What kind of filter will reject the side channels (that are at 500kHz and 1.5MHz) without being detrimental to the phase of the signal of interest at 1MHz?

You can also tell me it's impossible and maybe suggest an alternate design.
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aaron_do
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Re: Adjacent Channel Rejection filter for GMSK receiver
Reply #1 - Oct 9th, 2013, 6:26pm
 
Hi,


You missed out one important piece of information which is the signal bandwidth. For the phase variation, you will mainly be concerned with ISI (inter-symbol interference). I believe a rule of thumb is generally you want the group delay variation of your filter to be less than 0.1 times the data period. Your filter rejection should be more than 60 dB + the required SNR for your specified BER. With those two requirements, you should be able to use filter tables or online calculators to find out what kind of filter would work (i.e. the shape of the response, and the filter order).

If your requirements turn out to be too stringent, you could consider using a digital filter. You will still need to design an anti-aliasing filter, but it will be significantly easier, especially with a high ADC sampling rate. Digital filters can be designed with excellent rejection, and zero group-delay variation.

BTW, you may have another problem to worry about, but I'm not sure how serious it is. If your channels are 500 kHz apart, and you use a 1 MHz IF, then the channel at 11 MHz or 15 MHz (is there one?) will be your image channel. Your IRR (image-rejection ratio) will need to be more than 60 dB + SNR req.. At RF, that would be a very tall order, but at IF it may be do-able. You can refer to Razavi's RF Microelectronics book to see what kind of LO IQ balance you will need to achieve that. If you down-convert to zero-IF, you can avoid the image problem and also loosen the requirements on your channel filter.


regards,
Aaron
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pa2ees
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Re: Adjacent Channel Rejection filter for GMSK receiver
Reply #2 - Oct 9th, 2013, 7:05pm
 
Hi Aaron,
 Thanks for the awesome response!  You are correct, I did not include the signal bandwidth, which is what makes the filter that much harder to realize, as the bandwidth is fairly wide (my bitrate is 200-250 kbps).

The 'rule of thumb' is exactly the kind of thing I am looking for, as it seems like only experts in the field give out rules of thumb, whereas theses (is that really how you pluralize thesis?) and papers on the subject do not.

I am planning on using a digital filter as well once I convert the signal which would be immediately after the bandpass filter. The A/D would be 3-5 Meg samp/second.  I will be using an FPGA so a linear phase filter will be quite easy to do.

In answer to your other comments: only three channels so far (13.0, 13.5, and 14), so mixing the middle one down is my biggest concern.  I shouldn't have to worry about any unwanted images.

Last but not least, I have considered down-converting to zero-IF.  Can you give me some good pointers/papers on the advantages/disadvantages of that?  It seems like making a low-pass instead of a bandpass would be easier for my situation.

Again, thanks for your response!

- pa2ees
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aaron_do
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Re: Adjacent Channel Rejection filter for GMSK receiver
Reply #3 - Oct 10th, 2013, 2:07am
 
Thanks, but I'm no expert...I just happened to have asked similar questions in the past. That said, you can find that rule of thumb in literature (or just google it). If you want more accuracy, you will need to do some kind of system simulation.

Regarding zero-IF, the filter specs will be relaxed, but you will have two channels to be digitized. You will also need to consider DC offset which adds to the design complexity and the size. I haven't worked on GMSK demodulators so I don't know the issues, but I have seen them in literature before...maybe you could look around.


regards,
Aaron
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