RobG
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Looks like I'm pretty late in responding. Too bad the board is slowing down.
As mentioned, it has three levels and you make it with a differential referential reference (V1 and V2). Top level is V1-V2, obtained by connecting one input to V1 and the other input to V2. The bottom level is V2-V1, obtained by reversing the connections. The third level is 0, which is obtained by connecting both inputs to the same value. Thus it is perfectly linear, although common mode rejection of the buffering amplifier can be an issue if the point you connect to to obtain 0 is not half-way between V1 and V2.
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