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Method/algorithm to design an RF power amplifier (Read 12463 times)
aaron_do
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Re: Method/algorithm to design an RF power amplifier
Reply #15 - Dec 01st, 2013, 5:47pm
 
Hi baab,


Quote:
Hi,

I want to ask for help again. Please confirm if my understanding is correct.

+ First, I need to calculate load resistance based on the formula:
P = VDD2/(2Rload)


nope you are not correct. This formula applies if you are designing a power amplifier. From your system diagram, you are clearly not designing a power amplifier. You are simply designing an amplifier that works at RF. In fact from the paper you attached, you are really designing an LNA. You should concentrate your reading on LNA design.

Quote:
+ With the load calculated above, put it into the circuit and sizing the component to get the output power.


don't use the load calculated from above.

1. For a 50 dB gain amplifier your will need at least 2 but more likely 3 stages.

2. You probably have a power consumption specification. This will roughly determine how much gm each stage can have. From there, you can calculate the load impedance you need at each stage to get 50 dB gain.

3. As it is a multi-stage design, you will need to optimize the gain distribution to get the best tradeoff between noise and linearity. You also need to pay careful attention to stability.

However, in the paper you sent, the RF amplifier has a gain of only 13 dB. This is a much more reasonable number than the 50 dB gain you seem to be designing. Why do you want such high gain?


Aaron
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baab
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Re: Method/algorithm to design an RF power amplifier
Reply #16 - Dec 1st, 2013, 11:40pm
 
Well, thanks.
You said that from power consumption we can infer the value of gm. And from gm, we need to calculate load impedance of each stage to get 50dB gain.

I got stuck at this.
The product of un*cox ( electron mobility*oxide capacitance) about 500uA/V^2 for my NMOS.
I tried everything such as increase VGS, W/L in order to get a large value of gm but it is still very small, about 3 S.
And therefore, voltage gain is also very small.

What is the typical value for gm to get a gain about 20dB (not to mention about power disspation here)?

And following what you said, if gm = 3 S then is it possible to find a load impedance so that its gain is 20dB?
Assuming that gain = gm*Rload => Rload is very large and impractical!



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aaron_do
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Re: Method/algorithm to design an RF power amplifier
Reply #17 - Dec 2nd, 2013, 1:54am
 
Hi baab,


have you tried putting in the numbers? 3 S is very large. If Rload = 50 ohm, you have a gain of 150 (20*log(150) = 43.5 dB.

You can also use your input transformation network to get more gain.

I think you really need to do a lot more reading of the basics. Sounds like you might want to start off with Razavi's Analog book.


regards,
Aaron
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baab
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Re: Method/algorithm to design an RF power amplifier
Reply #18 - Dec 2nd, 2013, 2:18am
 
Oh, sorry, I was mistaken I meant gm = 0.003 S.
I put Rload = 1k and get gain G = gm*Rload = 3. That is far too low.
Quote:
You can also use your input transformation network to get more gain.

Did you mean "output transformation network"?
Quote:
I think you really need to do a lot more reading of the basics. Sounds like you might want to start off with Razavi's Analog book.

I know that, haha. I have read Razavi's book for half of a year and I am reading RF power amplifier by Marian K. Kazimierczuk.

You know I don't want to proceed like that but there are no other choice. I have to read up and learn while doing.

Regarding to gm = 0.003S, is it too low? What is the typical value you use to get a gain about 20dB?  I know we can calculate it based on Rload but I don't know how small Rload (after impedance transformation network) can be.


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tm123
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Re: Method/algorithm to design an RF power amplifier
Reply #19 - Dec 2nd, 2013, 7:58am
 
baab,

I have read the paper you posted.  Note that in the paper they specify that the RF amplifier has the performance in Table 1 on Page 3.  Based on this information it is not clear to me why you are trying to design an amplifier with 50dB of 'power gain'.  At the risk of making things more complicated, I would argue that you should be designing for a certain amount of 'voltage gain' not power gain.  The reason for this is that the mixers you are driving are on chip, therefore the mixer input impedance is arbitrary and there is no such thing as RF amplifier output power, only output voltage.  Otherwise you will have to spend time and effort to impedance match the RF amplifier to the mixer which I would only recommend in specific cases, and this is not one of them.  Also note that there is a noise figure spec of 3.8dB which is not difficult but you need to pay attention to that.

All this being said, you are designing an LNA not a PA.  My advice for you would be to take a step back and derive the gain, noise figure, linearity and input/output impedance for a simple NMOS differential pair with degeneration (resistive or inductive, your choice).  I think you need to gain some insight into the basic circuit operation before you try to design anything more complicated.  You may also find that a simple differential pair with inductive degeneration will do the job for you.  It would be impractical for someone to explain this in a forum post, so I would recommend using references such as the text by Gray/Meyer to help you.

As Aaron has said, trying to achieve 50dB of gain (voltage or power) in a single amplifier stage is unrealistic.  Based on the paper you posted, I am not sure that is what you really need.

Hope this helps.

Tim
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baab
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Re: Method/algorithm to design an RF power amplifier
Reply #20 - Dec 4th, 2013, 7:24am
 
Thanks a lot for guiding me!
I will switch to LNA, will come back later.
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