lvbq
New Member
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Posts: 8
Shanghai
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HI all,
In the application of the opamp, see fig1 ,there will a pole in net A because of the input resistor R1 and input capacitance Cp.
Therefore, in my design of a opamp, I want to minimize the input capacitance of the opamp.what I want to ask is how to minimize it ? does the circuit in the fig2 plot work?(for minimize the miller effect Cgd of M1 &M2 for using the M3 &M4 )
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