HI all,

In the application of the opamp, see fig1 ，there will a pole in net A because of the input resistor R1 and input capacitance Cp.

Therefore, in my design of a opamp, I want to minimize the  input capacitance of the opamp.what I want  to ask is how to minimize it ?
does the circuit in the fig2 plot work?(for minimize the miller effect  Cgd of M1 &M2 for using the M3 &M4 )

You can minimize the input capacitance simply by reducing the device size of the differential pair.  This requires reducing the tail current source and/or increase of the over drive voltage of the differential pair.

A problem with your circuit is that the high gain of the opamp is spoiled by the resistance of the feedback.  You probably want to use a two-stage opamp to isolate the cascode of the folded cascode opamp from the resistive load.