Here is the Gmax and NFmin pictures. Sorry for the inconvinence. I can't attach two pictures in only one post.

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The resistance depends on how you model your inductor. The simplest model you could assume would be just a series inductor and a series resistor. In such a case you could simply do a DC simulation to check the resistance. Try reading up on inductor modeling for more complicated models. Also, its a good idea to design your own inductors if you want the best performance.


Aaron

Hi,


I'm not really sure why the 1kohm resistor is there. I don't think it would have much effect on the frequency response. It might make some sense if you were using practical inductor and capacitor values.

By the way, regarding your NFmin, I haven't seen NFmin that low even for just a single transistor, but I haven't really checked for the more advanced processes. You might want to check the value with theoretical equations just to see if its in the ball park.


cheers,
Aaron


just realised you're using 0.13um technology, so its not that advanced. I didn't know NFmin could be that low...

Hi baab,


I don't understand what mistake you made in the first place. If you are only trying to find the NFmin of the two transistors, then it is OK to use all other components from analogLib. If you want to use components from TSMC's PDK, then there's no way you can get 1 F capacitors and 1 H inductors. Large values will not substitute well either as parasitic resistance and capacitance will affect their performance. In other words, just use ideal components from analogLib for the simulation of NFmin. If you want to take into account inductor Q, then just assume a reasonable value and add in some resistance.

As for the device width, it might make some difference to the NFmin if the 1kohm resistor comes into play. I would just remove it if I were you as I still can't really figure out what its for. I'm pretty sure it is not part of any filter.


regards,
Aaron

Hi baab,


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This is the correct method if you want to the absolute lowest possible NF. In the end, you will have to take into account inductor Q.

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Its very difficult if you are using on-chip inductors. If you are using off-chip inductors, it is possible to get NF lower than 1 dB even in CMOS. The two big contributors to the LNA NF are the transistors, and the inductors.

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Actually there is no point in trying because the results won't make any sense at all. As I mentioned, your inductors play a critical role in the noise performance, and very large inductors typically can't get very good Q. There is some optimal inductor size which will give you the best Q.

Also, if minimum possible NF is really your goal, then you must design your own inductors. It is possible to get significantly better Q by designing your own inductors. Also, if you can make use of bondwire inductance, it also has much better Q than typically found on-chip (its usually limited to around 1-2 nH).

You should also know that any trace of appreciable length will contribute inductance. For example, your PDK's inductor has the position of its terminal defined. But for your design, you might need to run a trace just to reach that terminal. This will contribute inductance, and so it should be taken into account. It really depends on your design though. This is mainly true for high frequency or high power designs.

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You must follow the DRC rules (for the most part). That means you can design your own inductors (good idea), capacitors (not always necessary), and even transistors (sometimes people use special layouts for specific applications like high-power designs).

However, in the context of NFmin, you are better off using capacitors and inductors from analogLib, and then adding some parasitic resistance. For example, suppose you need a series inductor, Lg, at the gate. You might assume that it will be about 5 nH at 2 GHz, or 63j ohms. You can then assume a Q of 10. This would put your series resistance at 6.3 ohm. Now simulate your NFmin with a 6.3ohm resistor in series with the gate (don't add any inductance, Lg). Based on your noise plot, your simulation will tell you the actual inductance you need; maybe 70j ohm. Then you can re-calculate the series resistance and repeat the process. Since the resistance depends on the inductance you need, it will be an iterative process.

BTW, L1 in your figure can be substituted with a large resistor (10k for example). L2 may not have much effect on your NF, so it can be considered last.

hope it helps,
Aaron

Hi baab,


I think my explanation was a bit unclear.

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This is the main point that you misread. If you are simply looking for NFmin, you don't need to add any inductance at all. You only need to add the equivalent parasitic resistance of the inductor. By definition, the inductance (the imaginary impedance) itself will not have any impact on NFmin. However, you need to make an assumption about what is the parasitic resistance to use based on how much inductance you intend to add. So if you think about it, its an iterative process.

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Yes. You can try multiple metal layers, different widths for the inner turns, and you could even try different shapes to fit your design area better.

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They are made using much wider metal so they have less series resistance.

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As I explained above, an inductor's impedance can be written as R + jX. The value X has no impact on NFmin. So you only need to include R in the simulation of NFmin. You could also do a post-layout simulation of the transistor since the transistor's layout will affect NFmin. After you have found the ideal value for the inductance, you can try and design it with the best possible Q.

Using ideal inductors just lets you know how good or bad your inductors are when you include them later.

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I guess I answered this already.


hope it helps,
Aaron


EDIT:
btw, I believe the 1kohm resistor was just to model the noise from the load inductor.

Hi baab,


I think for the most part you are getting it. Lg doesn't affect NFmin since Lg is at the input. Ls might affect NFmin. I can't really remember, so you would have to do some analysis. If it is at the input, it won't affect NFmin. If it is after a lot of gain, it will have little effect on NFmin.

As for Vgs, its a tradeoff. It affects linearity, power consumption, and fT. In fact, if noise and gain are your only considerations, a low overdrive voltage can actually be better in some circumstances.


regards,
Aaron