Thank you for your insight, it was very helpful.
Quote:This is the correct method if you want to the absolute lowest possible NF. In the end, you will have to take into account inductor Q.
As you said, I need to take inductor Q into account by using a resistor and an inductor from analogLib.
What is the difference between the inductor got from this (including the ideal resistor and ideal inductor) and the inductor from TSMC 0.13?
I suppose that they have the same series inductance and resistance.
Quote:Actually there is no point in trying because the results won't make any sense at all. As I mentioned, your inductors play a critical role in the noise performance, and very large inductors typically can't get very good Q. There is some optimal inductor size which will give you the best Q.
I see.
Quote:You must follow the DRC rules (for the most part). That means you can design your own inductors (good idea), capacitors (not always necessary), and even transistors (sometimes people use special layouts for specific applications like high-power designs).
When you said design, do you mean that I need to change dimensions such as width, number of turns, ... to get optimum value?
Quote:Its very difficult if you are using on-chip inductors. If you are using off-chip inductors, it is possible to get NF lower than 1 dB even in CMOS. The two big contributors to the LNA NF are the transistors, and the inductors.
I remember that somewhere but I can't figure out why. Could you explain why off-chip inductors give a better NFmin?
Quote:However, in the context of NFmin, you are better off using capacitors and inductors from analogLib, and then adding some parasitic resistance. For example, suppose you need a series inductor, Lg, at the gate. You might assume that it will be about 5 nH at 2 GHz, or 63j ohms. You can then assume a Q of 10. This would put your series resistance at 6.3 ohm. Now simulate your NFmin with a 6.3ohm resistor in series with the gate (don't add any inductance, Lg). Based on your noise plot, your simulation will tell you the actual inductance you need; maybe 70j ohm. Then you can re-calculate the series resistance and repeat the process. Since the resistance depends on the inductance you need, it will be an iterative process.
I'd like to ask some questions.
1. Because all inductors are not ideal. They have internal resistance. If so, is my initial plot NFmin with the circuit using ideal inductors (from analogLib) and Q = infinity useless?
I feel that because after all we replace all the ideal inductors with other inductors with Q taken into account. And now NFmin will change, not the one before.
2. You said "don't add any inductance, Lg", I am wondering why. Does NFmin depend on Lg, Ls? Assuming that they are ideal (without internal resistance).
Sorry for asking a lot of questions. I can't ask anyone else in my place. Your help and books are what I can find!
I will sum up what I have to do step by step and hope you could help me check if that is OK.