jockeymonto
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abu dhabi
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Hi all, In CMOS diff amplifiers we have to generate the common mode voltage which serves as gate bias for the input diff transistor pair. I know there are several bias schemes based on resistors given in text books. But the total voltage at the gates of input diff transistor pair for diff amp is given as:
VG1=Vcm + (delta/2) VG2=Vcm - (delta/2)
where delta= Vin1-Vin2.
I need to know how in practical design we create Vin1-Vin2/2. Do we use op amps to subtract them? How do we divide them by tow? Do we just ride the Vin1 and Vin2 on Vcm? How is the above equations implemented?
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