Hi baab,

I may not be the best in this but let me give this a shot.

RLC would be your resonant tank.

Use omega^2 = 1/(LC), where omega = 2*pi*fc

Rp is there to modify your Q factor. Q = R(sqrt (C/L))
Typically this Rp is present in your inductor by converting the series resistance to parallel resistance (need source on this)

Someone please correct me if I am wrong

Natnoraa

Hi baab,

on a sidenote, maybe due to my newbie-lity, i've never touched on Av=-gm*Rp in RF circuits. The gain was always either S21 for small signal or Power Gain for large signal. lna works on small signal thus s21 but for pa it's power gain. This Rp is still a lil' confusing to me apart from using it for tuning Q.

yes resistor occupies larger area so usually I'll use RF choke as biasing for the drain or a quarter wavelength T-line. if L is fixed so will your Rp if you're using a foundry's pdk. in this case the big T.

I suppose your C has to be large enough for a high impedance so as to minimize leakage to vdd for your fundamental frequency (the inductor blocks it but if impedance from your C is low enough, signal will flow to Vdd). couple with your L, the theoretical impedance from your LC tank will be infinite.

Once you've set your C to have a large enough impedance [1/(omega*C)] = Z0, use the formula to find your required L. try to play around with the values to obtain the best results because of the Q factor of your LC tank.

I may be wrong. Someone please point to me if there's something conceptually wrong.

and, yep, i stand firm that you've to work on the two formulae to get the 3 values. However, please let me know if you know something more about the Rp or others may assist (:

natnoraa

Hi baab,


the L and C form your tank. So the resonant frequency is found from ω² = 1/LC.

1) C is made up of two parts. First the parasitic capacitance of your devices and the load. Second is however much additional capacitance you decide to add in parallel with the circuit. Often switchable capacitors are added to critical nodes in order to tune the resonant frequency (especially in a test chip). Otherwise, C should be as small as possible if you want the highest possible gain.

2) For the inductance, L, making it as large as possible while keeping the resonant frequency the same will generally get you the highest gain. You need to study about inductor design, and actually try to design inductors before you will really know the limitations here. But basically Rp = QωL, so the larger the L, the larger the Rp, and the higher your gain.

3) It should be obvious at this point that Rp is just the parasitic resistance of your inductor, but depending on the technology, the output resistance of your transistor might play some part. You don't want to deliberately add a resistor here. Also, your comment about large resistance = high noise is incorrect. you have to consider whether the resistance is in series or shunt to the signal path. If it is in series, then the more resistance, the higher the noise. But if it is in shunt, then the smaller the resistance, the higher the noise.

When I mentioned maximizing L, the goal was to get the highest possible gain. This will give you a nice big signal at the output that is insensitive to the next stage's noise. However, you don't want to saturate your LNA, so depending on your design, you may not want the highest possible gain anyway. Unfortunately, it isn't really possible to design the LNA without knowing what kind of load it is driving (i.e. the mixer).


regards,
Aaron

For the device capacitances, you can try reading any analog IC text such as Razavi's CMOS analog IC Design textbook.


regards,
Aaron

Hi baab,


its easy to simulate the output capacitance. I guess the easiest method would be to run an S-parameter simulation, and convert the s-parameters to Y-parameters. For this simulation, you can replace the output inductor with a very large ideal inductor (1 H for example) so that it doesn't affect your result.


regards,
Aaron

Hi baab,


if your S11 is not good then you just didn't match the amplifier properly. Use the smith chart to see how you can adjust your values. The smith chart is an extremely useful tool for RF design so you should try and learn it asap.

As for the output capacitance, Y22 is much more appropriate than Z22. I suggest you refer to "RF Circuit Design" by Chris Bowick if you want to understand these network parameters better.


regards,
Aaron

Hi baab,


since the lowest point is at the correct frequency, it means that your resonant frequency is correct. But your input resistance is clearly wrong. I haven't looked at the link but I'm guessing it says Rin = wTLs. You probably just used the wrong value for wT in your calculation...

You can use the smith chart to see exactly where you went wrong...


regards,
Aaron