Forum
Forum
Verilog-AMS
Analysis
Modeling
Design
Theory
Welcome, Guest. Please
Login
or
Register.
Please follow the Forum
guidelines
.
Jul 21
st
, 2024, 4:27am
Home
Help
Search
Login
Register
PM to admin
The Designer's Guide Community Forum
›
Design
›
Analog Design
› power consumption of an ADC per sample
‹
Previous topic
|
Next topic
›
Pages: 1
power consumption of an ADC per sample (Read 2071 times)
jovial
Junior Member
Offline
Posts: 19
power consumption of an ADC per sample
Mar 15
th
, 2014, 5:39am
Hello everyone !!!
How to calculate/estimate the power conversion of an ADC per sample in terms of the parameters like sampling frequency, etc. ???????????
Necessary papers/reference would be helpful.
Back to top
IP Logged
aaron_do
Senior Fellow
Offline
Posts: 1398
Re: power consumption of an ADC per sample
Reply #1 -
Mar 16
th
, 2014, 11:10pm
Hi,
it completely depends on architecture. There is an excellent ADC performance survey by Boris Murmann from Stanford. Sorry I don't have the link, but you shouldn't have much trouble finding it...
Aaron
Back to top
there is no energy in matter other than that received from the environment - Nikola Tesla
IP Logged
Johan Dijkhuis
New Member
Offline
Posts: 3
Re: power consumption of an ADC per sample
Reply #2 -
Apr 10
th
, 2014, 11:07am
See also
http://converterpassion.wordpress.com/
This gives a pretty complete overview. It starts at a few fJ / conversion step, up to about 10 bits. After that it increases. Most very low power medium resolution ADCs are SAR, high resolution is dominated by sigma-delta.
Best Regards,
Johan.
Back to top
IP Logged
Pages: 1
‹
Previous topic
|
Next topic
›
Forum Jump »
» 10 most recent Posts
» 10 most recent Topics
Design
- RF Design
»» Analog Design
- Mixed-Signal Design
- High-Speed I/O Design
- High-Power Design
- Mixed-Technology Design
Analog Verification
- Analog Functional Verification
- Analog Performance Verification
Measurements
- RF Measurements
- Phase Noise and Jitter Measurements
- Other Measurements
Modeling
- Semiconductor Devices
- Passive Devices
- Behavioral Models
- Transmission Lines and Other Distributed Devices
Design Languages
- Verilog-AMS
- VHDL-AMS
Simulators
- Circuit Simulators
- RF Simulators
- AMS Simulators
- Timing Simulators
- System Simulators
- Logic Simulators
Other CAD Tools
- Entry Tools
- Physical Verification, Extraction and Analysis
- Unmet Needs in Analog CAD
General
- Tech Talk
- News
- Comments and Suggestions
- Opportunities
« Home
‹ Board
The Designer's Guide Community Forum
» Powered by
YaBB 2.2.2
!
YaBB
© 2000-2008. All Rights Reserved.
Copyright 2002-2024
Designer’s Guide Consulting, Inc.
Designer’s Guide
® is a registered trademark of
Designer’s Guide Consulting, Inc.
All rights reserved.
Send comments or questions to
editor@designers-guide.org
. Consider
submitting
a paper or model.