eternity
Junior Member
![* *](https://designers-guide.org/forum/Templates/Forum/default/starblue.gif)
Offline
Posts: 28
|
Hi there thanks for the reply. I guess you interepreted my question in terms of layout
I meant in terms of schematic. There is usually an extra unit cap placed in the DAC of SAR ADC to get binary weighed Vref levels(Vref/2, Vref/4..etc.,). I recently spotted in a journal seeing that extra cap connected to input voltage rather than to vref. So I want to get cleared on this.
Thanks Eternity
|