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Can noms Connect its Bulk to a higher node rather than gnd?
Aug 13^th, 2014, 8:17pm

Hi everyone,

I am confused about the connection of the bulk in process with deep n well.

In deep n well, lots people use it as a "two well process" and connect the B of a nmos to its S, to avoid body effect and noise. But it seems all the nmos still share a common substrate. The bulks will have voltage difference! Is it OK to connect the bulk to higher volt node?

And what about in two well process? I thought the bulks can connect to different voltage node, since they have separate well. But all the pwell share the same p- substrate, so they are still connected?

I am totally confused about how to connect the bulk:-/
Is there anyone who ever try that? Please give some explanation or give some reference, and thanks for your kind help.

wendy

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aaron_do

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #1 - Aug 13^th, 2014, 9:59pm

In a deep n-well process the NMOS is inside a p-well (this is your bulk connection). That p-well is inside a deep n-well, and the deep n-well is in the substrate. A diode is formed between the p-well and the deep n-well, and another is formed between the deep n-well and the p-substrate.

So you can have two NMOS transistors whose bulks (two different p-wells) are isolated by back-to-back diodes.

Aaron

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wendyyang100

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #2 - Aug 14^th, 2014, 1:10am

Hi, aaron_do

Thanks for your reply.

It seems the deep n-well you mentioned is quite different from what I learnt. I thought a deep n-well is something buried in the p-substrate, and they need to be surrounded by a ring of n-well.( there is no p-well in the process)

Is it depends on the fab? Or is the buried thing a totally different process?

Thanks.

wendy

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aaron_do

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #3 - Aug 14^th, 2014, 2:23am

Hi,

the picture you describe would work just as well assuming the n-well ring connects to the "buried" deep n-well.

I'm not sure how exactly the thing is fabricated, but I doubt that anything is buried. It sounds a lot more difficult to inject dopants only at a specific level of the substrate. On the other hand, I think BJTs do have a buried layer - SOI has a buried oxide, but the fabrication is different I believe.

regards,
Aaron

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wendyyang100 New Member Offline Posts: 7	Re: Can noms Connect its Bulk to a higher node rather than gnd? Reply #4 - Aug 14^th, 2014, 8:16pm Thanks for your kind reply, Aaron.
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carlgrace

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #5 - Aug 15^th, 2014, 2:53pm

Not that it is germane to your design but I thought I would comment a bit about deep n-well. �At least in TSMC, the deep n-well is indeed a buried layer. �Then, n-well contacts sink down to this layer to bias it. �

As Wendy said, there is no "p-well" (at least in tsmc). �Processes that have a p-well implant are often called "Triple well" because then you can isolate both n and p devices.

In a deep n-well process, your nmos devices are indeed implemented in the p-substrate, but, as Aaron said, this portion of p-sub is isolated by back-to-back diodes from the rest of the substrate, hopefully reducing noise pickup.

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aaron_do

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #6 - Aug 15^th, 2014, 6:54pm

Quote:

Not that it is germane to your design but I thought I would comment a bit about deep n-well. At least in TSMC, the deep n-well is indeed a buried layer. Then, n-well contacts sink down to this layer to bias it.

Guess I was wrong then...sorry.

Its interesting to note anyway. Just wondering though, how do they bury the deep n-well? Do they simply grow another layer of silicon on top? Also, does the deep n-well cover the entire chip? How does the performance compare to triple well?

thanks,
Aaron

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carlgrace

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Re: Can noms Connect its Bulk to a higher node rather than gnd?
Reply #7 - Aug 19^th, 2014, 10:45pm

aaron_do wrote on Aug 15^th, 2014, 6:54pm:

Quote:

Not that it is germane to your design but I thought I would comment a bit about deep n-well. �At least in TSMC, the deep n-well is indeed a buried layer. �Then, n-well contacts sink down to this layer to bias it. �

Guess I was wrong then...sorry.

Its interesting to note anyway. Just wondering though, how do they bury the deep n-well? Do they simply grow another layer of silicon on top? Also, does the deep n-well cover the entire chip? How does the performance compare to triple well?

thanks,
Aaron

At least in TMSC, they bury the deep n-well by implanting before they grow the epi. So you're right when you speculate they grow another layer of silicon on top.

The deep n-well implant is a mask layer. You typically use it sparingly because it uses up a lot of area (especially if your'e having trouble with well proximity effect). I've never seen it used over the whole chip because the point of it is to have isolated islands on the chip. I would suspect drawing deep-nwell over the whole chip wouldn't be any better than not using it at all.

Triple-well performance is superior to deep n-well in cases I have seen.

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aaron_do Senior Fellow Offline Posts: 1398	Re: Can noms Connect its Bulk to a higher node rather than gnd? Reply #8 - Aug 19^th, 2014, 10:58pm Hi Carl, thanks for the reply. I was wondering if it was simply used over the whole chip to avoid having an additional mask, but I totally forgot the fact that you would lose the isolation...in fact I guess it would become equivalent to a n- substrate instead of a p- substrate Aaron
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