I'm designing a switch controlled circuit. It contains one opamp, several switches and some resistors. All the switches are controlled by one clock. The clock frequency is 40KHz.

Now I'm trying to run pss+pnoise simulation to check the total noise from 30Hz to 4MHz. Because of the clock, the beat frequency is set to 40KHz.

I studied some posts in this forum and some papers from google. It seems the noise integration range should be from 0~(beat frequency)/2. For all the samples I found, the beat frequencies are very high. What can I do for such low beat frequency?

Hi Ken,

Thanks for the reply. I tried to set he max sidebands to high (100) and it took quite long time for the simulation. And then I set it to 7. The simulation was much faster and the result was similar, only 1% difference. I think 7 should be enough for me.

Now I have another question. I think the integration from 0 to beatfrequecy/2 is for the total noise across the whole noise frequency range. Is there any methods to divide it into different frequency range?  For example, what's the noise from 0 to 30Hz? And what is noise higher than 1MHz? The project is an imaging related design. We need to know what's the noise for different frequency range. We can do it with traditional noise simulation. But I can't find any solution with pss+pnoise simulation.