Schligger
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Hi everyone,
I'm working on a fully differential OTA (folded cascode) and have a question about the switched-capacitor common mode feedback. A similar circuit is shown in the appendix. It only shows the half circuit of the OTA. There, bias voltage "BiasE" is the desired output common mode voltage. In my case, this is generated by a resisitve voltage divider and equal to half of the supply voltage. I haven't found anything in literature about the initial value of "V_CMC". If i don't care about it, the tail current of the OTA isn't really well defined during Clock-Phase PHI1. (when capacitors Ca are precharged to the desired output common mode voltage, decoupled from Capacitors Cb).
Does this any matter? I would also connect "CMC" to "BiasA" during this phase, but I'm not sure if it's the right way.
Has somebody already desinged such a SC-CMFB and could help me?
Thanks a lot
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