CHL
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Hello
I'm confused how to calculate the resolution.
2^N clock cycles must be counted in order to achieve N-bit effective resolution.
For example, averaging 4 samples gives 2 bits of resolution, while averaging 8 samples yields 3 bits.
If the output is 00110011...., the 3bit signal is (0+0+1+1+0+0+1+1)/(2^3) = 4/8 = 1/2, whose binary code is '100'.
However, I cannot understand the required frequency.
If the input frequency is 10kHz and the ADC provides 16bit output, the sampling frequency should be 2*10k*2^16 = 1,310,720,000 Hz
This looks like reasonable, but weird.
What is wrong with my calculation?
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