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Hi,


your question is too broad. Your question is more likely to be answered if it something specific. Also, PA designs will be quite different depending on the application so you might want to give some details.

In terms of having a successful design (I'm just gonna assume you're new to this), some of the keys which I find useful are:

1) Make sure your final testbench represents the actual measurement setup as accurately as possible in order to get good correlation.

2) Make sure to test start up conditions using transient analysis. i.e. Ramp the supplies.

3) Make the design highly tunable. That means current biasing, digitizable tank caps etc.

4) Model your traces. In a high power design, even a relatively short trace can affect matching. Model the effects of nearby traces too. Couping to metal loops such as ground loops can de-Q your inductors.

5) For PA design in particular, pay attention to breakdown. That includes everything from transistors to metal traces, resistors etc

Perhaps the most critical part of the design will be the load transformation network. So that's a good place to start.


regards,
Aaron

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Hi,


if you already know the different components of your capacitance -  overlap capacitance, channel capacitance, and parasitic capacitance - then you can get the values from a DC analysis and a layout parasitic extraction. However, the capacitance is changing over the operating point, so you could also get a lumped value by assuming your own model for the transistor (for example Cgs,Cgd, Cds, gm, r0, rg...), and running simulations (PSS + PSP probably).


cheers,
Aaron