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Verilog-AMS Error in Virtuoso (Read 2487 times)
Dshoter
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Verilog-AMS Error in Virtuoso
Apr 15th, 2015, 9:03am
 
Hi. I'm trying to simulate an ideal MOSFET in verilog-ams. After the code been written, save it under a verilog-ams cell viewn in Virtuoso, and them the symbol is automatically created. As soon as I instantiate the symbol in my Test Bench, when I try to run spectre (with verilog ams already defined) I get the following error: "input.scs" 43: I14 is an instance of an undefined model MOSFET
Any one has any idea how to solve it?

With best regards.
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boe
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Re: Verilog-AMS Error in Virtuoso
Reply #1 - Apr 24th, 2015, 7:49am
 
Dshoter,
Verilog-AMS is not a legal input for Spectre simulations.
- B O E
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Geoffrey_Coram
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Re: Verilog-AMS Error in Virtuoso
Reply #2 - Apr 30th, 2015, 5:39am
 
Verilog-A is legal, and I wonder if your model is actually analog-only, in which case you should be able to save it as view-type veriloga.
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