Dear Experts

I have the following question about negative Miller capacitance. Referring to slide 23-24 in the following link http://www.ece.tamu.edu/~spalermo/ecen620/lecture22_ee620_limiting_amps.pdf
I tried to build a fully differential telescopic cascode amplifier and use negative Miller effect by adding the capacitors (highlighted in schematic attached). My understanding is that a large value of the added capacitors can cause stability issues as essentially it creates a positive feedback loop (creating a negative capacitor looking into the input nodes). However to my dismay, even when the capacitor is increased to 10pF, the output looks stable (transient simulation with a 10mV differential input step, conservative errpreset). To investigate further, I added the capacitors directly to the output instead of Vx and Vy to create a positive feedback (refer to schematic) and no signs of unstable behavior were noticed. I then changed the positive feedback into negative feedback configuration and the output looked same as it was with positive feedback. Could you let me know what might be going on in here?

Thanks and regards

sch: Schematic

....unless otherwise your circuit is not biased/designed properly
The circuit is biased properly, in my opinion, with all devices in strong inversion saturation. May not be optimum design, but then again it is not designed for a tapeout. It is only meant for concept illustration.

I didn't understand your plots, ...
The red plot is the input differential voltage of step of 10mV  (measured at the input of OTA Vin+ and Vin-) and the light pink plot is the differential output voltage (Vout+ - Vout-) for different feedback configurations (The 10pF caps connected across Vin+ and Vy (Vout+ and Vout-) and so on).

You mentioned that the gain from input to the source of cascoded device is around -1. I think it should be much higher than that (Impedance looking into the source of cascode is comparable to gds). Differential gain from input of opamp to Vy-Vx is shown in attached figure. Also plotted is the differential gain of the OTA.

Finally I did run simulations to check bandwidth at the input (Vin+ - Vin-). Attached is the result. The red plot shows input differential signal at OTA input (Vin+ - Vin-) when the capacitors are connected between Vin+ and Vx and Vin- and Vy respectively. I reconnect them
as capacitors between Vin+ and Vy and Vin- and Vx respectively to get negative Miller effect and the plot is shown in light pink. Finally I remove the capacitors and the response is shown in golden yellow. Bandwidth extension of pink over red is understandable, but being less than yellow puzzles me.

Connecting a capacitor C across an ideal voltage controlled voltage source of gain -A can be represented by equivalent capacitances of C*(1+A) at the input and C*(1+1/A) at the output. This circuit is far from ideal. the low frequency input capacitance(which you can extract from ac simulation and dividing the imaginary part of input admittance by frequency) will be negative if A > 1. But this doesn't imply instability because a pole is also formed due to the capacitor loading the output node. You have to derive the transfer function to see what happens. In this case, A could even be < 1 because of cascode, but even otherwise, increasing the capacitor does not automatically imply instability. This is not the same as having a constant negative capacitor.

Also, raja.cedt: for latchup, you need dc positive feedback.

Hello nrk1 and RobG. Thank you for your replies.

RobG, could you explain why the added capacitors not form feedback path around the opamp? Also as I mentioned in the first post, adding the capacitors between the input and output terminals of the opamp, in such a way that positive feedback is realized, does not show unstable behavior when excited with a step.

nrk1, the gain between the input and the cascode nodes is not less than 1 and is shown in the post 3, in the same thread. Also isn't having a single RHP pole sufficient to make the system unstable? The output pole due to the load capacitor might be in LHP, but would the system be stable if the pole formed due to the added capacitor between gate and the cascode node ends up being in RHP?

Thank you all once again.