ULPAnalog
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Hello
How about diode connected load. Since you seem to be operating at low frequencies you could bias the input pair in weak inversion to maximize its gm (gm,p) while biasing the diode connected load in strong inversion. You will get a gain of gm,p/(2*gm,n) (Assuming you measure the output single-ended, otherwise for fully differential case gm,p/gm,n). By appropriate biasing you can get gain of around 2-5 V/V. Since it is a ratio of gm of PMOS to NMOS, you can expect it to vary across corners (Particularly fs and sf).
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