The Designer's Guide Community
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 17th, 2024, 9:41am
Pages: 1
Send Topic Print
current mode control buck regulator non idealities (Read 1819 times)
Senior Member

Posts: 117

current mode control buck regulator non idealities
Jun 15th, 2016, 2:13pm

I am new to current mode regulation loop, pls help me in understanding these

1) how to estimate systematic error in ouput current(or voltage)  due to finite loopgain like an LDO ? (not sure even something like this exists here ...  as I have no clue how to model dc gain)

2) the negative feedback regulation loop sets the duty cycle needed for the output to reach the reference.
so here what is the impact of loop delay (component delays added up)  on the average output ?

if the delay is too large I would expect stability issues as it adds  excess phase to the loop.

Back to top
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to Consider submitting a paper or model.