Geoffrey_Coram wrote on Jan 24th, 2017, 7:00am:According to Annex E (Spice Compatibility) of the Verilog-AMS LRM (version 2.4), you should be able to just instantiate Spice primitives like a resistor and a capacitor:
Code:resistor #(.r(5k)) R1(p,a);
capacitor #(.c1(70p)) C1(a,gnd);
capacitor #(.c2(500f)) C2(n,gnd);
There are also some voltage sources available: vexp, vpulse, vpwl, vsin (no vdc, but all of the sources have a dc parameter, so you just have to set the other parameters properly).
Hi, Mr. Coram.
It seems that the primitives Hspice supports doesn't include the voltage sources you just mentioned. The reason for this problem is likely to be the version of Verilog-AMS LRM.
I am using Hspice-2009. It only supports, even Hspice-2014, Verilog-AMS LRM (
version 2.2).
Besides this feature, there are also other enhanced functions in later versions, which maybe useful for what I am doing.
Could you give me some advice about which software supports the Verilog-AMS LRM of later version? (Those similar to Hspice would be easier for me to get started.)
Thanks in advance.