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Custom Bit sequence in verilog-ams (Read 951 times)
bit_an
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Custom Bit sequence in verilog-ams
Apr 10th, 2017, 2:18pm
 
Hello,

I want to generate a specific bit sequence (in verilog ams) for testing my system. Also with specific rise time and variable pulse width. Is there any reference for such operation?!

Thanks
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Ken Kundert
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Re: Custom Bit sequence in verilog-ams
Reply #1 - Apr 10th, 2017, 8:07pm
 
You might want to take a look at the random bit stream generators found at the Verilog-AMS page.

-Ken
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