I have calculated transconductance of a NMOS transistor with formula (2*Id/(Vgs-Vth)) and simulated the same circuit in Cadence Spectre with same parameters via two methods, including: 1) DC Analysis>Analog environment>Results>Print>DC operating points
2) plotting derivative of current in respect to Vgs, but Simulation results are different from theory (approximately two times)
Would you please explain why does this happen?