AndreyVolk
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Dear Sirs.
I want to make my little Standart Cell library. I want that in my library there must have been not only gates but also triggers. How to choose the necessary and sufficient set of standard cells for a standart cell library? By what principle is the selection of cells? (It is clear that there is a variation of _X1, _X2, ...) How to determine the size of transistors in cells? Align the delay on the 0->1, 1->0 or the rise time, the fall time? If possible, advise literature on this issue.
I already asked on the forum community.cadence.com No one answered.
Thanks.
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