eeBismarck
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Q1 I am simulating an oscillator 24MHz with trimming (8-bit) ability. There is a variable called "TRIM_CODE" as decimal value in my test bench. I use a veriloga model to translate TRIM_CODE into binary code and connect them to my oscillator. Then I use pss to check frequency and some times it can't convergence. Q2 TO solve convergence problem, I remove veriloga model, and make 8 vdc by setting 8 variable D7...D0 in global variable from TRIM_CODE by equations. It seems convergence problem solved, however, if I sweep TRIM_CODE in pss, the result doesn't change. Only default value of TRIM_CODE is calculated by pss.
Conclusion I just want to know how I can sweep TRIM_CODE in pss without such strange problem ? Is there any one can help ?
Thanks !
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