krishna95
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Hi, I came across "* cds_inherited_parameter * " in a verilogA document which mentioned it in the following code. It looks like it is used for modelling a monte-carlo simulation effect.
module res(vp, vn); inout vp, vn; electrical vp, vn; (* cds_inherited_parameter *) parameter real monteres = 0; parameter real r = 1k; localparam real r_effective = r + monteres; // nominal resistance plus // monte-carlo mismatch effect analog V(vp, vn) <+ (r_effective)*I(vp, vn); endmodule
I wrote this code in my cadence verilogA simulator it seems its not recognizing the cds definition as it appears gray as shown in figure. Although there are no error while running the va file, the resistor component thus made gives an error in transient simulation. The error specifies that "parameter montres is unknown". But when I write an extra line "parameter real montres=0", it works fine. But then what is the function of cds_inherited _parameter? How is it used?
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