Let's say there is a digital logic driving a capacitor Cload through a transmission line. If we have a good conductor for the transmission line, such that Zo~sqrt(L/C), we could potentially boost the rise time at the load. We can do this by choosing Rs slightly below the Zo of the Transmission line but not too below to cause ringing. This can help in reducing power in the driver and pre-driver.

Is there a flaw in the above argument or any possible issue? Let me know if the question is not clear.

The argument follows from the analysis shown in this link

http://www.sigcon.com/Pubs/news/6_06.htm


I have attached an image to make my argument clear. If there is attenuation in TLine, there is a potential way to reduce power at the source by increasing rise time at the source. However, the load would see sharper rise time due to reflection (or resonance). This value is actually slightly below Zo, Rs<Zo rather than at Zo, as it would just transmit the signal with attenuation at Rs=Zo and degrade the rise time at the load.