Hi all, I have encountered some challenging issues:

(1) When performing STB simulation analysis on an OPA with a feedback loop, I observed: When VDD <5V, the phase curve appears normal. However, when VDD >5V, the low-frequency phase approaches 0°. The circuit schematic and simulation results are attached.

It should be noted that the differential pair in the circuit is not operating in the saturation region (to minimize the minimum operating voltage). This circuit was originally designed to operate at VDD <5V. I attempted to modify its process  to enable operation at higher voltages (e.g., 7V).

(2) For a chopper-stabilized operational amplifier with a feedback loop consisting of multiple switched capacitor networks (selecting different capacitor groups at different time intervals), I encountered similar low-frequency phase approaching 0° phenomena when performing stability analysis using PSS+PSTB simulations.

As a newcomer to this field, I'm unable to determine the root causes or solutions. I sincerely hope to receive valuable suggestions from experienced colleagues.