jerome_ams
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We finally got the expected simulation results. Let me emphasize on it, to close this post: Actually, while connecting properly the windings, the gap and the core and using a diode on the secondary side to block this side when the primary is energized, the expected simulation results were obtained. Real problems started when the testbench was slightly changed to fit to our very application: no diode is used on the secondary side, but an analogue switch. When switching the primaty OFF and the secondary ON, a peak current was observed on the secondary current instead of the expected "triangle". Replacing the switch by a trivial Dmos VHDL-AMS model solved this issue!
At a first glance it feels like changing the resistance of the switch from Roff to Ron using a digital signal as a trigger did not give the same results as changing the resistance of the diode fom Roff to Ron using the voltage drop at the diode as a trigger... Timig issue? => we are still investigating this testcase...
Cheers, J
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