Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
Cadence Virtuoso and window manager (i3wm)	Lala878	6	6327	Oct 26^th, 2016, 9:52am By: Lala878
Cadence IC610 errors at startup	sutapanaki	10	3989	Jun 30^th, 2016, 10:41am By: Ken Kundert
Silvaco (Gateway, Expert, SmartSpice, SmartView ... ) - opinions	Tako	2	3978	Nov 4^th, 2015, 4:20am By: Tako
Sorting list numerically in Cadence SKILL Language	cheap_salary	7	305	Sep 17^th, 2015, 9:07pm By: sheldon
Urgent!!! How to recover schematic from multiple sheet schematic???	hiSkill_11	1	2661	Sep 10^th, 2015, 8:51am By: hiSkill_11
Replace/change layers and its purpose in a bounding box	chn	0	2289	Sep 3^rd, 2015, 1:53am By: chn
Define operating point for a component	jqjqjq	0	1900	Sep 1^st, 2015, 6:14am By: jqjqjq
Automation using cadence SKILL language	chn	5	5191	Aug 26^th, 2015, 5:05am By: Tako
Moved: Phase noise for a ring oscillator - Started by: Naga Kishan This Topic has been moved to RF Simulators by Ken Kundert
cadence SKILL	beginner456	2	4261	Aug 19^th, 2015, 4:06am By: chn
Cannot access non-graphical X server	August West	3	6261	Mar 26^th, 2015, 9:15am By: August West
What are these "pink lines" in Cadence schematic editor	DoYouLinux	1	2967	Mar 26^th, 2015, 7:56am By: Geoffrey_Coram
Cadence text editor	Ken Kundert	2	4176	Mar 18^th, 2015, 12:47pm By: Ken Kundert
overbar for inverted pin name	Shahriar	3	4876	Mar 4^th, 2015, 11:21pm By: boe
cadence layout command	dog1	0	1987	Mar 2^nd, 2015, 6:27am By: dog1
PyCell Studio Installation Problems	Scotty	1	4238	Oct 25^th, 2014, 5:15pm By: Scotty
Moved: first transient ---> save final condition ----> second transient - Started by: devilmaysmile This Topic has been moved to Circuit Simulators by Ken Kundert
Virtuoso & Verilog/VHDL	tdlrali	1	3604	Jul 24^th, 2014, 1:30am By: boe
Cannot import "Spectre" netlist	Pavel	0	2924	May 21^st, 2014, 7:38am By: Pavel
Interaction between blocks and analoglib	Davivilla	13	3100	Apr 10^th, 2014, 1:56pm By: Lucho

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