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PLL Jitter Specification (Read 74 times)
Lieutenant Columbo
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PLL Jitter Specification
Sep 11th, 2002, 5:16pm
 
I work on the design of synthesizers for wireless communications and am more accustomed to dealing with phase noise rather than jitter. I have been trying to reconcile some things in your paper with my what I am using and am coming up against some conflicts.

Very often I deal with specs like synthesizer phase noise shall be less than 2 degrees rms (when integrated from 1kHz to 1MHz say). This number is calculated as follows:
1. integrate the SSB phase noise profile ('script L')  between the given frequecny limits
2. multiply by 2 to account for the power in USB and LSB
3. take the square root to get a number in radians rms
4. multiply by 360/(2pi) to get degrees rms.

Very often the number is quoted in seconds (rms) by multiplying the result of step 3 by T/(2pi) where T is the period. Reference oscillators for optical apps are often quoted like this where the integration is done from 12kHz to 80MHz.

Which jitter am I calculating here (period jitter, cycle-to-cycle jitter, long-term jitter, FM jitter, PM jitter...) and how is it related to the jitter number you quote?

Note that with this definition of jitter, the value of the jitter is unaffected by passing it through a frequency divider, in conflict with jitter you use in your paper.

In step 2 when I multiply the power by 2, is it not assuming the LSB and USB are uncorrelated
while on page 4 of your paper on cyclostationary noise you say they are in fact (fully?) correlated.

Thanks
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Ken Kundert
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Re: PLL Jitter Specification
Reply #1 - Sep 11th, 2002, 5:33pm
 
I believe that the jitter you are computing is effectively the edge-to-edge jitter, Jee. I don't talk about it in the original paper, though I do in in the most recent one. It only is valid in driven systems (i.e. for PM jitter sources). Consider a system driven with a clean or noise free square wave, and assume each transition at the input creates a transition on the output, but that the system is noisy so that the output signal exhibits jitter. Edge-to-edge jitter is then the variation in the time between an input transition and the resulting output transition. If the system is exhibiting simple PM jitter (the noise is white and so the jitter in the transitions is uncorrelated) then the k-cycle jitter Jk = sqrt(2)*Jee for all k because Jk contains the jitter from two transitions where Jee contains the jitter from only one transition.

To see that the jitter you compute is Jee, realize that the instantaneous jitter j is related to the instantaneous phase noise phi by
   j(t) = phi(t)*T/(2*pi)
When you divide L by 2 you are converting L to Sphi using eqn 30 (and so implicitly assuming that L contains only phase noise), and then when you integrate it over frequency you are computing the total noise power in Sphi, which equals the variance of phi. Applying the square root converts the variance to the standard deviation, which gives you a number in radians (rather than radians2, which is the units for phase noise power). You can then either convert to degrees by multiplying by 360/(2*pi) or to jitter in seconds by multiplying by T/(2*pi), which is Jee.

You did not integrate over all frequency, you integrated from fa to fb where fa > 0 and fb < f0. For your result to be reasonable it must be that the phase noise below fa and above fb is negligible. This is only true with driven systems. With autonomous systems, the phase noise always goes to infinity as f->0. You are "okay" because you are looking at a frequency synthesizer that is assumed to be locked to a clean source and so is a driven system. It also helps to explain why Jee is only defined for driven systems.

Concerning your comments about the correlation in the lower and upper sidebands, we are both assuming that the noise in the signal is completely in the phase (there is no amplitude noise) and so, in fact, the sidebands are completely correlated. I discuss this phenomenon in both my papers on RF simulation (designers-guide.com/Analysis->Introduction to RF simulation and its application (also in JSSC Sep99) and my paper and presentation on cyclostationary noise (designers-guide.com/Theory->Noise in mixers, oscillators, samplers, and logic: an introduction to cyclostationary noise). However, the factor of two is valid, as you can see by examining the derivation of eqn 30.
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Lieutenant Columbo
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Re: PLL Jitter Specification
Reply #2 - Sep 11th, 2002, 5:43pm
 
Every thing you say seems reasonable. However, I see this method of calculating rms jitter applied to autonomous systems all the time, whether it is valid or not. As I said before, the phase noise in reference oscillators for optical applications is integrated from 12kHz to 20MHz to calculate the rms jitter. The phase noise is definitely not negligible below 12kHz for these oscillators. I can only guess that if the oscillator is used in a packet based comm system jitter due to the phase noise below 12kHz may have little effect on packets with durations on the order of milli-seconds.
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Ken Kundert
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Re: PLL Jitter Specification
Reply #3 - Sep 11th, 2002, 5:45pm
 
If they are integrating the noise over 12kHz to 20MHz then the noise outside that range must be negligible. Clearly the noise below 12kHz in an oscillator is not small, so it must be that the application is such that it is insensitive to noise below this frequency. It probably means that whatever follows the oscillator is able to track its phase up to about 12kHz. So while I believe the measurement makes sense, I do not know what to call the result. That seems to be a general problem with jitter. The terminology is often not well defined and inconsistent definitions exist.
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