You can find some of that information in the documents on this website (try
Predicting the phase noise and jitter of PLL-based frequency synthesizers in
www.designers-guide.com/Analysis. You might also try
David C Lee, Analysis of jitter in phase-locked loops.
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, no. 11, pp. 704-711, November 2002.