>>there is no delay between signals,(every positive and negtive edge is very  steep),

i assume you are talking about the output of the VCO. yes, if your VCO operates at very high output frequencies, you have outputs with steep positive and negative edges... this is due to the time delay around the loop being very small  

>>and the  pulse (up)&(down) which are swith control both become  a  steep thread! however the phase between the refrence clock and  output of VCO is locked!

i think this is because you are feeding the output of the VCO (which had steep edges) to the PFD and comparing it with an ideal input clock. Put a buffer after the VCO so that you get a pulse waveform and then compare it with the input clock


Surya