Hello Spectre gurus,

I encountered a problem while simulating a mixed transistor level + VerilogA circuit. It appears to be  caused by insertion of a block named mvi_HF_core.va, although this same block simulates fine in a smaller schematics with few transistors.

Below is the error reported by Spectre:
<BEGIN>
......
Error found by spectre in `NCH_LVA':`MN1', in `NA210':`NAND0', in
       `Probe_driver':`I38', during hierarchy flattening.
   `mvi_HF_ core' is being redefined.
Internal error found in spectre in `NCH_LVA':`MN1', in `NA210':`NAND0', in
       `Probe_driver':`I38', during hierarchy flattening, during circuit read-
       in.  Please run `getSpectreFiles' or send the netlist, the spectre log
       file, the behavioral model files, and any other information that can
       help identify the problem to support@cadence.com.
   Error detected in file `patch.c' at line 158.
   Assertion failed.
<END>

I seem to recall having seen this before...  There shouldn't be any name conflict - I tried 5 different ones already.  Our Cadence support is still looking for an answer.

Any advice is really appreciated....

Thanks,
Misha