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Accumulating jitter (Read 2859 times)
wgfry7
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Accumulating jitter
Oct 06th, 2004, 7:40am
 
In my platform I have basically two clock generators/PLLs, where one receives its clock from the other.  Of course, each PLL has its own jitter characteristics.  My question: does the jitter from the first PLL accumulated w/ the jitter from the second PLL?
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Jitter Man
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Am I? Or am I so
sane that u just
blew your mind?

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Re: Accumulating jitter
Reply #1 - Oct 6th, 2004, 8:19am
 
Low frequency or long term jitter from the first clock generator will appear in the output of the second unattenuated. However, the loop filter of the second PLL will filter out the high frequency jitter from the first. So at frequencies above the loop bandwidth of the second PLL, the only source of jitter will be VCO2.

Jitter Man
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