Hi,

I am curious about the big difference between the simulation speed for two similar circuits. Would you please help me?

I have been redesigning a circuit using 0.25um CMOS technology. The original circuit was implemented using 0.35um CMOS technology.

The design has two oscillators, one very fast (~1GHz), the other slow (~1MHz for the original design, ~4MHz for the new design). So it takes so long time to run the transient simulation for both design.

But I am curious that the simulation time for the new design is much longer than that for the original design though both circuits has similar structure and spec.

It took near 300,000 seconds to run a 500us transient simulation using SPICE option method=gear. But it took more than 450,000 seconds to run just a 50us transient simulation using default integration method (trapzoid). As well known, transient simuation is much slower if using gear method. So it makes me deep confused.

The detail statistics is shown below.

For the original design.
    analysis      time      # points  tot. iter  conv.iter
    transient    291621.51    500001  81511395  22966268 rev=******

For the new design.
    analysis      time      # points  tot. iter  conv.iter
    transient    409348.59      5001  45405049  12645293 rev=******
   
From the above data, the convergent iteration of the new design is about half of that of the original design. But remember it is a 500us transient simulation for the original design, and just a 50us transient simulation for the new design. That means the average internal time step is about 1/5 of that for the orignal design.

What makes the simulation for the new design interated so much times? And its internal time step smaller?

I notice one difference between the SPICE models for 0.35um and 0.25um. The SPICE model for 0.35um has a non-zero HDIF parameter(hdif=3.5e-7), but HDIF=0.0 for the 0.25um SPICE model. I suspect that will deteriorate the discontinuity of the 0.25um SPICE model. Thus SPICE tool need smaller internal time step and much more iteration.

I am not an expert in SPICE algorithm and MOS model. So I need your help!

What do you think the reason? Do you have any advise to speed the simulation?


Thanks
Yawei

Hi, August,

I modified the 0.25um SPICE model a little, assigned HDIF=2.5e-007, ACM=12. Now I am running a 200us transient simulation. The simulation speed almost doubles. So I think the model must have impacted the iteration and time step.

But it is still much slower than the simulation for 0.35um design. I will try method=gear following your advise.

Thanks very much.
Yawei

Trapezoidal ringing is always "point-to-point" ringing (alternating between too high and too low).  If it is not point-to-point ringing, or if it becomes smooth ringing as you tighten tolerances, or if it remains when not using trapezoidal, it is not trapezoidal ringing.

If it is not trapezoidal ringing, it must be your circuit itself. The reason why your simulations run so slowly is because it exhibits a parasitic oscillation or highly underdamped behavior.

-August