Hello Everyone,

I was trying to design an oscillator with a known jitter. I also had an existing oscillator in 0.18um technology. The measured jitter in TIE of 30us was 1.4nsec. The period jitter was 483psec. The oscillator frequency is 4MHz.

I used tdnoise in Spectre to predict the jitter for the oscillator for which I have measured results. When I integrated the noise on the tdnoise form from 33.3kHz to 2MHz (fo/2) as in Ken's paper, I got 10.4mV. I divided this number by the SR of the ring oscilltor (6.5MV/sec) and I got 1.6nsec. This is pretty close to what I have on silicon (1.4nsec measured). DId I do anything stupid here!.

Can anyone tell me if I did the right thing by intergating from 33.3kHz to 2MHz. If I integrate from a lower frequency (1kHz to 2MHz)  I see the jitter is prety large due to 1/f contributions.  the fc is at 10kHz.

Using the same strategy I predicted the jitter for my new oscillator and it seems to be about 14pSec when integrating 33kHz to 2MHz.

I thuought I should have multiplied by sqrt(fo*30us) for k-cycles jitter. Did I already take care of it by doing integration from 33kHz to 2MHz.

Does the multiplication factor for k-cycles jitter only comes in when tdnoise is  integrated at higher  frequencies.
I set the sweep in pnoise for tdnoise to absolte.

Any suggestions will be appreciated.

ic_engr

Hi,

Can you explain the measured jitter in TIE, period jitter, and phase jitter for me and their relationship? It has many definitions for jitter. Sometimes I am confused.

I will appreciate very much.

Yawei