ic_engr
|
Hello,
I was simulating the Oversampling Sigma-Delta using pss. I have a dff which is used prior to the quantizer to capture the states.
What I have notices is that whenever I have a D-flip-flop I am getting convergence problems.
Can someone suggest what I should replace it with. I tried using the Verilog A D-flip-flop from this Designer' Guide but it does not help.
ic_engr
|