My design environment is TSMC 0.18UM MM/RF 1P6M SALICIDE 1.8V/3.3V PROCESS PDK (for Cadence) Revision 1.1a. There are some BJT transistors in the circuit. The cell name of BJT is ' vpnp3 ', the view name is ' spectre ' in my schematic. There is no layout pcell of BJT transistor in the PDK, so I make the layout design by myself.

When I run a extraction by the diva rule in the PDK, it will give me a warning massage ' Cannot match terminal counts for vpnp3 ivpcell tsmc18rf '. Because of this problem, I can not clean the LVS. If I use Hercules to run a extraction job, I can get the right BJT transistors. The runset file of Hercules is ' LVS_Hercules_0.18um_MM_1p6m.20a '.

How can I get the right extracted view by diva rule? If I can not get the extracted symbol, how to simulate the circuit?

Thank you.

I agree with Art. The chances are (I can't remember without looking at the PDK) that the spectre view has 4 terminals - the fourth being the bulk, which is an inherited connection.

It's quite possible that the Diva rules only extract 3 pins, and so using the symbol (which is what you're supposed to use in the schematic) will solve this problem.

That's my guess, anyway.

Ah, I've just realised that this error probably comes from the extraction, not the LVS, in which case the above theory wouldn't explain it (although it's probably a problem you'll hit further down the line).

Most likely your bipolar layouts do not match the way that the device is being recognised. I thought that the PDK came with layouts (not pcells though) for the bipolars - if not, I'd have thought sample layouts would be available from TSMC?

Regards,

Andrew.

Robert,

Well, it's either that you're breaking some design rules and laying out a structure in an illegal way - and hence the extract rules are not handling this (is the design DRC clean?) or it's a problem with the extract rules. It's extremely unlikely to be a tool problem.

Regards,

Andrew.

Without knowing the specific details of the process (which I'm not familiar with), I can't really comment. Sorry! Also, I don't really know how you've done the layout, so it would be hard to advise you even if I was familiar with the process.

Andrew.