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ethan

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PSS, PAC, PNOISE for OTA with SC CMFB
Jun 30^th, 2005, 6:56am

hi there,

I got problem with PSS, PAC, and PNOISE simulaion for my fold-cascode OTA with SC CMFB. have read Ken's paper and tried again, but I still couldn't get the appropriate results, I think.

Hence I still would like to ask some body whether he or she would like to look into this problem further if doesn't mind. I appreciate your help.

I am new here and don't know how to attach my netlist in this forum. I can send it to your email if you are interested.

The brief description about my circuit and setup is following:

1. for the two diff-pair inputs, one input with 2.5v vdc ("V4") as common mode.
another input is vsin ("V3"). four clock signals for SC CMFB (clk1 and clk1_b, clk2 and clk2_b) for transimission gate switches with all 200kHz.
I didn't use "psin" as port, I only use vsin.

2. Since I followed Ken's paper on page 4 "First make sure the input signal is disabled",
I didn't specify the frequency value and transient amplitude in vsin, am I right?

3. In PNOISE setup, for input part, I don't know how to choose, to choose "none",or "voltage source", or something.
for output part, I chose "voltage", not port, not instance. Am I right?

4. For the waveform of PNOISE, its shape is still like the shape of open-loop gain plot.
for PAC, I got 10dB gain, which just like the results when I use common AC analysis, 10dB gain. However,
when I use equvilant circuit for SC CMFB, I can achieve 70dB; without CMFB for open-loop, I can achieve above 60dB.

5. When I setup PSS and PNOISE, I found I need "port" for the inputs of diff-pair. So I found port "psin" in my library, but how can I specify the certain amount resistance (by default is 50ohms) in psin for diff-pair inputs? I attach the psin properties in this email. Which is the correct way to setup psin? Or I totally don't need to psin, just to work with vsin?

6. I notice in PNOISE, there are two ways to simulate noise, one is in frequency domain with port "psin" inserted, another is in timedomain with "vsin" inserted as source. I have done two ways (I know what I did was not 60% right). My noise waveforms' shape just looks like open-loop gain waveform shape, there is no flicker noise corner frequency. It also is in same shape with what I did by using simple "noise" simulation in spectre. Can anybody tell me why?

7. for PSS, I doubt my results.

8. I am using TSMC0.35um technology and I think I only have spectre in our designkit in this school. We got spectre_RF in our 0.18 um technology designkit. Can I still apply them to spectre?

Thank you for your time and consideration.

Ethan

ps. I can email your my waveforms and netlist.

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ethan

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Posts: 36

Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #1 - Jun 30^th, 2005, 7:10am

Here, I have tried Ken's paper for sample_and_hold circuit, I didn't follow exactly parameters from that example. But I think I have done pretty much same. But my results (waveform) look not correct. I got the waveform shape for my PNOISE outcome just like the shape for common opamp open-loop gain plots.

Then sample-and-hold netlist , especially for PNOISE setup in frequency, is posted as following:

// Generated for: spectre
// Generated on: Jun 29 16:21:54 2005
// Design library name: ****
// Design cell name: sample_hold
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/home/cad/designkit/TSMC35/cmosp35.4.3/models/B3V/mm0355v.scs" section=tt_5v

// Library name: ****
// Cell name: sample_hold
// View name: schematic
V1 (Vin 0) vsource dc=0 mag=0 type=sine pacmag=1 ampl=1 fundname="input" \
fundname2="input2"
V47 (ph1 0) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clock"
V48 (0 ph1_b) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clock_b"

M1 (Vin ph1 Vout 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M10 (Vout ph1_b Vin vdd!) pch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) \
ps=2u+2*(2u) pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 \
region=triode
C0 (Vout 0) capacitor c=10p

simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
sensfile="../psf/sens.output"
dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
dcOpInfo info what=oppoint where=rawfile
pss pss fund=200K harms=10 errpreset=moderate tstab=10n
+ swapfile="swap" method=gear2only tstabmethod=gear2only
+ maxacfreq=50M annotate=status
pac pac start=1 stop=50M maxsideband=10 annotate=status
pnoise ( Vout 0 ) pnoise start=1 stop=50M maxsideband=10
+ iprobe=V1 refsideband=1 annotate=status saveallsidebands=yes
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
saveOptions options save=allpub

The sample and hold netlist for PNOISE with timedomain setup is posted as following:

// Generated for: spectre
// Generated on: Jun 29 16:21:54 2005
// Design library name: ****
// Design cell name: sample_hold
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/home/cad/designkit/TSMC35/cmosp35.4.3/models/B3V/mm0355v.scs" section=tt_5v

// Library name: ****
// Cell name: sample_hold
// View name: schematic
V1 (Vin 0) vsource dc=0 mag=0 type=sine pacmag=1 ampl=1 fundname="input" \
fundname2="input2"
V47 (ph1 0) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clock"
V48 (0 ph1_b) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clock_b"

M1 (Vin ph1 Vout 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M10 (Vout ph1_b Vin vdd!) pch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) \
ps=2u+2*(2u) pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 \
region=triode
C0 (Vout 0) capacitor c=10p

simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
sensfile="../psf/sens.output"
dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
dcOpInfo info what=oppoint where=rawfile
pss pss fund=200K harms=10 errpreset=moderate tstab=10n
+ swapfile="swap" method=gear2only tstabmethod=gear2only
+ maxacfreq=50M annotate=status
pac pac start=1 stop=50M maxsideband=10 annotate=status
pnoise ( Vout 0 ) pnoise start=1 stop=50M maxsideband=10
+ iprobe=V1 refsideband=1 noisetype=timedomain numberofpoints=1
+ annotate=status saveallsidebands=yes
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
saveOptions options save=allpub

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Ken Kundert

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #2 - Jun 30^th, 2005, 7:50am

Ethan,
Your post is a bit overwhelming in that it asks so many questions at once. I'll try to answer the ones I can.

1. Using voltage sources rather than ports is preferred in this situation. You do not need the termination resistors that are inherent in ports. It is odd you use vsin for the clock. I would expect either vsourse, vpulse, or vpwl.

2. Not exactly sure which paper you are referring to. I would expect V4 and V3 to be disabled (dc only) but the clock sources would be operating properly.

3. Presumably your output is a voltage and not a current and your output is not delivered to a port or resistor acting as a load. In this case you would specify the output as a voltage and pick the two output nodes (one of which would be ground if the output is single ended).

4. I don't really understand your circuit or how you expecte it to behave, so I cannot comment on this one.

5. You would only need a port at the input if you wanted to compute the noise figure (in a noise figure calculation the input source must be noisy). You should continue to use a vsource as the input.

6. The names they chose to describe the different types of noise you can compute are a bit confusing. "sources" is the time-averaged noise and "timedomain" is the noise at particular points along the clock waveform. See my paper on simulating switch capacitor filters for more information.

7. Everything counts on PSS, if it is not correct nothing will be correct. Focus on this problem first.

8. Spectre and SpectreRF are the same simulator, SpectreRF just has a few more analyses. Any design kit that works with Spectre will work for SpectreRF.

On your sample and hold netlists, I noticed that you have reference sideband set to 1 in the PNoise analysis. This implies that you are analysing the the noise transfer from the upper sideband of down conversion mixer. Presumably that is not what you want. I would expect refsideband to be 0.

Several times you compain that the noise looks like an open-loop gain plots. I am not exactly sure what this means. Perhaps you can be more descriptive about the results you are getting and how they differ from what you were expecting.

-Ken

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ethan

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Posts: 36

Re: PSS, PAC, PNOISE, further questions
Reply #3 - Jun 30^th, 2005, 1:56pm

Hello Dr. Kundert,

I am honoured to get your reply and instruction. Frankly, I am a little surprised because this is my first post in this forum. With your instruction, I worked on it today again, but I still didn't get it through waveform. Before I go into detailed, I would like to clarify some points.

1. Your paper which I mentioned in my first post is actually your paper regarding simulation switch capacitor filters on designer-guide website.

2. My differential fold-cascode opamp with SC CMFB only drive capacitive load, no buffers, and outputs are voltage (You are right.)

3. I work on Cadence for this design. The "vsin" in Cadence schematic is only for one input of diff-pair inputs, so after the netlist is created, vsin appears "vsource" in netlist (if I am not wrong). Meanwhile, in vsin setup, I only specified the DC=Vdd/2=2.5v for common mode, I didn't put other parameters in ac magnitude, amplitude, and frequency,etc, but did put pacmag=1 ( I post my netlist in this post).
So, you mentioned "disable V4 and V3 (dc only), is this what I did? right?

4. All other four clocks (two pairs of clocks) are all used with vpulse with 200kHz, which is 5us period.

In the next post, I will post results and waveforms with hand drew.

Thank you for your time and patients.

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ethan

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Re: PSS, PAC, PNOISE, further questions (cont'd)
Reply #4 - Jun 30^th, 2005, 2:13pm

(continued)

The following description is based on my fully-differential fold-cascode OTA with SC CMFB and capacitive load.

Then, today I did PSS, PAC, and PNOISE.

4.For PSS, only four clocks appear in "Fundamental Tones". I swept in time and select "differential nets", then the PSS response waveform in voltage itsself (from shape) looks like from what I got with transient analysis "tran". But the amplitude is too low, the upper limit
is -400fv, the lower limit is -700fv. The period is 5 micron second. I draw it below in rough, not in scale (sorry I don't know how to attach ps, pdf, or jpg files here)
I got the almost similar shape transient waveform, but with at least half period sit at VDD/2 as output common-mode reference point). I don't know why here is in femto volts level.
What I did wrong?

PSS Output voltage plot in period (5us)

|-------
| |
| | |-------
| | | |
| | | | |
| | | | |
| | | | |
| |_| |_|
|

5.For PAC simulation (open-loop), for harmonic 0, I only got about 10dB gain, f-3dB=27MHz. Previously, I had used equivalent resistors and one ideal voltage source to replace this SC CMFB and achieved open-loop gain about 70dB, f-3dB is also much more different than this (much small).

The plot is like following. Phase plot followed with Magnitude, since I only simulated 50MHz and I can see one pole at f-3dB point.

_________
+
+
+
+
+

PAC Output Magintude (dB)plot.

6. For PNOISE, in PNOISE tablet, I selected "output"-> "voltage"-> "positive output node" and "negative output node"; for "input source"->"voltage"->"input votlage source" which is V3 in this case.
Which input source should I select? If I want to output input-refered noise, I can not select "none" for input, right? Since I didn't use "port", I also can not select "Port" for input, right?
Then, I select reference side-band wit "Enter infield" = "0". Noise Type is "sources" as you mentioned. Then the waveform for output is following. But there is not flicker noise slope, no corner frequency, and no flat thermal noise plot. Same thing with what I got for sample-and-hold circuit PNOISE plot.
That's what I called the shape looks not correct as expected (no flicker noise and corner frquency). (I have used log scale in x-axis)

the output noise in V/sqrt(Hz) , about 39nV/sqrt(Hz)

PNOISE plot
_________
+
+
+
+
+

So, what I did wrong? In the beginning PSS setup?

I appreciate your time and help.

The netlist is posting in the next message.

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ethan

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Posts: 36

Re: PSS, PAC, PNOISE, further questions (cont'd)
Reply #5 - Jun 30^th, 2005, 2:21pm

(continued) I found it is too long to post (due to limitation requirement from forum). I have to cut the transistors part.

Part of netlist (created in Cadence):

// Design cell name: fold_cascode_new_lowpower_sc_TG_PNOISE
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/home/cad/designkits/TSMC35/cmosp35.4.3/models/B3V/mm0355v.scs" section=tt_5v

// Library name: cmosp35
// Cell name: tiedown
// View name: schematic
subckt tiedown gndPoint
R3 (0 gndPoint) resistor r=1 m=1
ends tiedown
// End of subcircuit definition.

// Library name: ECE492
// Cell name: fold_cascode_new_lowpower_sc_TG_PNOISE
// View name: schematic

// one input of diff-pair input with vsin source, setting up at VDD/2 commonmode

V3 (Vip net077) vsource dc=2.5 type=sine pacmag=1 fundname="fin"

// four clock phases (two pairs)

V48 (0 ph1_b) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clk1_b"
V49 (0 ph2_b) vsource type=pulse val0=5 val1=0 period=5u delay=0 rise=500p \
fall=500p width=2.7u fundname="clk2_b"
V47 (ph1 0) vsource type=pulse val0=0 val1=5 period=5u delay=200n \
rise=500p fall=500p width=2.2u fundname="clk1"
V46 (ph2 0) vsource type=pulse val0=5 val1=0 period=5u delay=0 rise=500p \
fall=500p width=2.7u fundname="clk2"

I3 (net077) tiedown

// another input of diff-pair inputs, setting up at VDD/2 common mode

V2 (Vref 0) vsource dc=2.5 type=dc

// four ideal voltage sources for biasing (I haven't conneted the OTA with biasing circuit yet)
// plus one VDD/2 voltage source as SC CMFB reference

V9 (net154 net077) vsource dc=1.5 type=dc
V14 (net188 net077) vsource dc=1.1 type=dc

V4 (Vin net077) vsource dc=2.5 type=dc

V6 (net158 net077) vsource dc=3.7 type=dc
V7 (net162 net077) vsource dc=3.3 type=dc

//VDD supply

V0 (vdd! 0) vsource dc=5 type=dc

//The following are all transistors for opamp, deleted some of them

M13 (Vcap2 ph2 Vop 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M12 (Von ph2 Vcap1 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M8 (net182 net188 net077 net077) nch5 w=10u l=2u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=4 \
region=triode
M10 (net186 net188 net077 net077) nch5 w=10u l=2u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=4 \
region=triode

//SC in CMFB

C1 (Vcap2 Vctrl) capacitor c=62.5f
C0 (Vcap1 Vctrl) capacitor c=62.5f

//load capacitors

C4 (Von net077) capacitor c=625.000f
C3 (Vop net077) capacitor c=625.000f

simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
sensfile="../psf/sens.output"
dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
dcOpInfo info what=oppoint where=rawfile
pss pss fund=200K harms=10 errpreset=moderate tstab=1n
+ saveinit=yes swapfile="swap" method=gear2only tstabmethod=gear2only
+ maxacfreq=10M annotate=status
pac pac start=1 stop=50M maxsideband=10 annotate=status
pnoise ( Vop Von ) pnoise start=1 stop=50M maxsideband=10
+ iprobe=V3 refsideband=0 annotate=status
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
saveOptions options save=allpub

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Ken Kundert Global Moderator Offline Posts: 2384 Silicon Valley	Re: PSS, PAC, PNOISE for OTA with SC CMFB Reply #6 - Jun 30^th, 2005, 2:40pm I don't see where the clock is connected to the circuit. -Ken
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ethan

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #7 - Jun 30^th, 2005, 9:00pm

Sorry, Dr. Kundert, I truncated most of transistors due to limited text. I post them in the following.

[quote author=Ken Kundert link=1120139802/0#6 date=1120167650]I don't see where the clock is connected to the circuit.

-Ken [/quote]

So, the gates of M13, M12, M20, M21, M22, M18, M19 are connected to phase 1, phase 1_complementary, phase2 and phase 2_complementary, respectively. These seven transistors consist of CMFB of fully-differential OTA.

Hope this can be clarified. Sorry for the confusion.

M13 (Vcap2 ph2 Vop 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M12 (Von ph2 Vcap1 0) nch5 w=2u l=500n as=1u*(2u) ad=1u*(2u) ps=2u+2*(2u) \
pd=2u+2*(2u) nrd=1u/(2u) nrs=1u/(2u) m=1 region=triode
M8 (net182 net188 net077 net077) nch5 w=10u l=2u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=4 \
region=triode
M10 (net186 net188 net077 net077) nch5 w=10u l=2u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=4 \
region=triode
M11 (Vop net154 net182 net077) nch5 w=5u l=1u as=1u*(5u) ad=1u*(5u) \
ps=2u+2*(5u) pd=2u+2*(5u) nrd=1u/(5u) nrs=1u/(5u) m=5 \
region=triode
M9 (Von net154 net186 net077) nch5 w=5u l=1u as=1u*(5u) ad=1u*(5u) \
ps=2u+2*(5u) pd=2u+2*(5u) nrd=1u/(5u) nrs=1u/(5u) m=5 \
region=triode
M5 (net215 net158 vdd! vdd!) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=17 \
region=triode
M20 (Vcap2 ph1_b Vref vdd!) pch5 w=6u l=500n as=1u*(6u) ad=1u*(6u) \
ps=2u+2*(6u) pd=2u+2*(6u) nrd=1u/(6u) nrs=1u/(6u) m=1 \
region=triode
M21 (Von ph2_b Vcap1 vdd!) pch5 w=8u l=500n as=1u*(8u) ad=1u*(8u) \
ps=2u+2*(8u) pd=2u+2*(8u) nrd=1u/(8u) nrs=1u/(8u) m=1 \
region=triode
M22 (Vcap2 ph2_b Vop vdd!) pch5 w=8u l=500n as=1u*(8u) ad=1u*(8u) \
ps=2u+2*(8u) pd=2u+2*(8u) nrd=1u/(8u) nrs=1u/(8u) m=1 \
region=triode
M18 (Vctrl ph1_b net158 vdd!) pch5 w=6u l=500n as=1u*(6u) ad=1u*(6u) \
ps=2u+2*(6u) pd=2u+2*(6u) nrd=1u/(6u) nrs=1u/(6u) m=1 \
region=triode
M1 (net223 Vctrl vdd! vdd!) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=3 \
region=triode
M0 (net186 Vip net227 net227) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=10 \
region=triode
M6 (Von net162 net213 net213) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=3 \
region=triode
M4 (net227 net162 net215 net215) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=17 \
region=triode
M3 (net213 Vctrl vdd! vdd!) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=3 \
region=triode
M7 (Vop net162 net223 net223) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=3 \
region=triode
M2 (net182 Vin net227 net227) pch5 w=10u l=1u as=1u*(10u) ad=1u*(10u) \
ps=2u+2*(10u) pd=2u+2*(10u) nrd=1u/(10u) nrs=1u/(10u) m=10 \
region=triode
M19 (Vref ph1_b Vcap1 vdd!) pch5 w=6u l=500n as=1u*(6u) ad=1u*(6u) \
ps=2u+2*(6u) pd=2u+2*(6u) nrd=1u/(6u) nrs=1u/(6u) m=1 \
region=triode

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Ken Kundert

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #8 - Jun 30^th, 2005, 11:43pm

You say your PSS analysis predicts a few hundred femptovolts at the output. What were you expecting? Is it possible that the output is so small because of perfect symmetry and near exact cancellation?

If you expect your output to be much larger, then you should try to debug the circuit by tracing the signals.

-Ken

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sheldon

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #9 - Jul 1^st, 2005, 2:47am

Ethan,

Before doing anything else, please add the bias network
to the and verify that the circuit sets up correctly. Folded
cascodes need good control of the currents in the devices
to operate correctly and it is extremely difficult to bias
correctly using voltage sources. Also check the biasing of
your pull-down current sources, M8 and M10. Typically the
pulldown current should be 2x + a little bit greater than
the tail current. In this case the tail current is biased by a
10/1 p-channel[M5] and the pull-down current sources are
10/2 n-channel devices[M8/M10]. BTW, if it is too much
work, it is okay to bias the cascodes with voltage
sources.

Best Regards,

Sheldon

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ethan

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #10 - Jul 1^st, 2005, 5:37am

[quote author=Ken Kundert link=1120139802/0#8 date=1120200224]You say your PSS analysis predicts a few hundred femptovolts at the output. What were you expecting? Is it possible that the output is so small because of perfect symmetry and near exact cancellation?

If you expect your output to be much larger, then you should try to debug the circuit by tracing the signals.

-Ken [/quote]

Sorry, I was thinking wrong at the time when I was composing (before I always tried to get the Vctrl result out, which need to be 3.7v, and thought the common mode output to see whether CMFB work). Sorry for confusion.

So this PSS waveform is in common mode condition. How can I setup PSS to get transient waveform with input signal amplification? Do I need to add differential ac small signal amplitudes in vourses?

But how about PAC? the gain was too small, only 10dB. But I was expected at least 60dB gain and I could get through the way by using equavilent resistors as CMFB.

And also PNOISE waveform, you think it is the case for this circuit?

Again, thank you for your time.

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ethan

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #11 - Jul 1^st, 2005, 6:59am

[quote author=sheldon link=1120139802/0#9 date=1120211279]Ethan,

Before doing anything else, please add the bias network
to the and verify that the circuit sets up correctly. Folded
cascodes need good control of the currents in the devices
to operate correctly and it is extremely difficult to bias
correctly using voltage sources. Also check the biasing of
your pull-down current sources, M8 and M10. Typically the
pulldown current should be 2x + a little bit greater than
the tail current. In this case the tail current is biased by a
10/1 p-channel[M5] and the pull-down current sources are
10/2 n-channel devices[M8/M10]. BTW, if it is too much
work, it is okay to bias the cascodes with voltage
sources.

Best Regards,

Sheldon [/quote]
Hi Sheldon,

Thank you for your suggestion. My supervisor asked me to build constant-gm biasing circuit. I haven't finished that yet. For the current tail transistors and top transistors, I use finger structures at this time. so, M8/M10 is 40/2, top p-channel is 30/1, do you think this is appropriate?

For the current ratio and transistor size ratio between input stage current source and that of cascode stage are 150uA:50uA and 170um/1um:50um/1u (PMOS input pair was chosen). So almost 3:1.

Please let me know any further improvement on this. Thank you for your time.

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ethan

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Re: PSS, PAC, PNOISE for OTA with SC CMFB
Reply #12 - Jul 1^st, 2005, 1:49pm

Hi everybody,

1. With Dr. Kundert's pointing (it was my mistake), I tried it today and found that, with my current setup(no change), I could get perfect common-mode output waveform and perfect Vctrl signal in CMFB.

But I still haven't figure out how to setup input stimulus to get amplified differential output waveform. Since PSS is a large signal analysis, I think I should be able to get large signal transient waveform(with large gain), right?
Any hints here? Maybe I should replace vsin with vsource?

2. for PAC, I still couldn't get large AC gain, only 10dB no matter which setups or ways I have tried. But I am expecting 70dB gain around, which it has been shown that if I replaced SC CMFB with equavilant resistors feedback and did it in conventional AC analysis.
Any help here?

3. For PNOISE, if I set the sweep frequency start from 0Hz, instead of 1Hz, the output noise waveform change a little bit (in amplitude and also in dB). But there is still no distinctive flicker noise corner frquency and no flat thermal noise floor. The output noise plot shows that it slowly falls all the way down with frequency increase.

Maybe with current configuration and MOSFET transistors in this circuit, there is no that corner frequency at all in fact. Any suggestions here?

Similarly, if, in PAC, I set the sweep frequency by starting from 0Hz, not 1Hz. not flat 10dB gain covers with certain frequency range and with f-3dB point. It slowly falls down with frequency increase.

What I did wrong? I think I am too focus now.

I appreciate your time and help.

Good long weekend.

Ethan

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