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programming a decoder in AHDL,Verilog-A (Read 5863 times)

vivkr

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Posts: 780

programming a decoder in AHDL,Verilog-A
Sep 01^st, 2005, 2:16am

Hi,

I am trying to create a macromodel for a decoder with 12 bits of control and 4096 outputs.

I was trying to create this using AHDL or Verilog-A but run into trouble with indexing of the signal array. It seems that I can only specify a numeric constant for the signal array. However, this seems to defeat the purpose of using indexed arrays of signals.

I would just like to be able to assert 1 out of the 4096 signals high based on the result of a calculation, and hence my array index element is not constant but a variable.

Has anyone tried such a thing in AHDL or Verilog-A?

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Geoffrey_Coram

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Posts: 1998
Massachusetts, USA

Re: programming a decoder in AHDL,Verilog-A
Reply #1 - Sep 1^st, 2005, 8:45am

It's a little clunky, but this works for me:

Code:

`include "discipline.h"

module dcdr(in,out);
  inout in;
  inout [0:3] out;
  electrical in;
  electrical [0:3] out;
  real vin;
  integer indx;
  genvar j;

  analog begin
    vin = V(in);
    if (vin < 1) indx = 0;
    else if (vin < 2) indx = 1;
    else if (vin < 3) indx = 2;
    else indx = 3;

    for (j=0; j<3; j=j+1) V(out[j]) <+ 0.0;

`ifdef ORIGINAL
    V(out[indx]) <+ 1.0;
`else
    for (j=0; j<3; j=j+1)  if (j==indx) V(out[j]) <+ 1.0;
`endif

  end

endmodule

If at first you do succeed, STOP, raise your standards, and stop wasting your time.

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