Hi Juzi,

I don't know what exactly you qualify as "a beginner" (undergrad student, B.S., M.S., junior designer,...?) and what is the goal of your design (student project, academic research, industrial project?), and I don't either know the technology you are going to use, but you should be aware that 10b 100MS/s is already quite close to the current state of the art. There are probably too many things to consider to pretend this to be an exhaustive list:

- thermal noise
- OTA design (settling time, slew rate, DC gain, ...)
- all the switched-cap things (charge injection, clock phase generation, clock feed-through, parasitic capacitances)
- clock jitter in S&H
- error correction for high resolution
...

If you have experience in OTA design and switched-capacitor design, you should be able to address these issues, but if you are a beginner in all these fields and if the work must comply with the specifications you set now, I would recommend to target a somewhat lower data rate and not more than 8-10b. In the open literature (e.g. IEEE collection), you will notice that for higher resolution people use error correction schemes, which definitely result in a more complex design.

Paul

thermal noise
- OTA design (settling time, slew rate, DC gain, ...)
- all the switched-cap things (charge injection, clock phase generation, clock feed-through, parasitic capacitances)
- clock jitter in S&H

I've read some papers about these issues. I've design a simple s/h circuit of a pipeline ADC(10-bit,33MS/s), however,it is just a student assignment. It is designed on circuit level with MOSFET, no layout,no tapeout. So I wanna to have a top-down  ADC design with my classmates.

juzi