Well, since you are at Oregon State.. I'll mention what I have discovered so far..
1. There is a part of the circuit - often called digital correction (which isn't "correcting" anything.. just doing the right timing alignment and summation) that is NOT part of the digital calibration loop..  its just part of the basic pipelined ADC..
2. there are a bunch of Calibration schemes..
off the top of my head.. many of them require access to the ADC between actual conversions.. or at startup..
- the simplest is one that has a memory.. that uses the output of the ADC to address a RAM - with the output being the "Calibrated value" (or a correction term easily added to the calibration value)..
Keep reading - (after a while I find key ideas easier to find as I gain familiarity with the source materiall) ..
and keep in mind the requirements of your application.
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Also you can start with a simple behavioral model of a pipeline converter (Mine is available for reference in one of the tutorials from the 2002 BMAS at www.bmas-conf.org) and add on the digital circuitry very easily to see what the impact is on your design with a Verilog-AMS simulator.  It might not be your first model if you know Matlab better.. but I know AMS better so I'd probably start there unless I found It was really too slow for my needs.
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one of the papers you have probably found proposes a way to calibrate the ADC without taking it off line. That looked like a neat approach to me, but maybe its slightly controversial?
Jbdavid