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sri_1983

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design RISC processor using cadence tools
Sep 23^rd, 2005, 4:31am

hello guy..im doin my final year project...my project is abt designing a processor using cadence tools..i dono at all abt this cadence tools...im stucked..but i f vhdl file for that processor and i f test it using fpga board..the code is working...so where do i start with cadence...i f to use asic design method for this processor...so pliz be free to help me..10x alot

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Paul

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Re: design RISC processor using cadence tools
Reply #1 - Sep 24^th, 2005, 5:53pm

I'm not exactly sure what you have and what you want (and your writing style doesn't improve the picture...). Are you looking for some code or for tool help? If it's about FPGA verification, why don't you use the tools which come with your FPGA? Most kits include some HDL simulator, a compiler and a P&R tool for the FPGA.

If this is the case, you may first state what FPGA you will use and what tools are in the kit.

Paul

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sri_1983 New Member Offline Posts: 2	Re: design RISC processor using cadence tools Reply #2 - Sep 24^th, 2005, 10:46pm 10x bro..okay i make myself clear here.. i have vhdl code for risc processor...so how do i implement in cadence (bottom-up)..u get bro...let say i have to fabricate my risc processor...so what a the steps i have to do b4 fabrication...
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Andrew Beckett Senior Fellow Offline Life, don't talk to me about Life... Posts: 1742 Bracknell, UK	Re: design RISC processor using cadence tools Reply #3 - Sep 25^th, 2005, 4:34am There is no tax on characters entered in this forum. Please write properly rather than in gobbledegook. You'll then stand some chance of getting an answer. Of course, your question will still need to be clear, but writing it in full would help... Andrew.
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Paul

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Switzerland

Re: design RISC processor using cadence tools
Reply #4 - Sep 25^th, 2005, 2:34pm

Although I am not an english-speaking native, I fully agree with Andrew. So please make a little effort on this, it may raise the amount of effort other people on the forum will invest in trying to understand your posts.

Second, I am not a digital designer, but I don't think you can simply throw your RISC processor code into a tool and expect it to synthesize and P&R while achieving acceptable performance.

Finally, chosing the right thematic area in the forum will allow you to have competent people read (and possibly answer) your posts. This is definitely not about analog design...

Paul

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